Academic Awards 2024 booklet

75 Automatic and Optimized Hardware Sequence Generation and Inline Interpretation ASML and its flagship metrology system, YieldStar, play a pivotal role in our modern society. As the semiconductor industry advances, YieldStar aids process control, reduces defects, and improves yield, facilitating the fabrication of smaller, more powerful chips. By enabling the production of more efficient semiconductor devices, ASML and YieldStar drive advancements in fields like healthcare, communication, and renewable energy. YieldStar is an optical metrology system, which means that it measures wafers by taking images of their surface in the visible light spectrum. Acquiring such nano-images is a sophisticated process. Engineers spend considerable manual effort (graphically) modelling and implementing (into code) YieldStar’s behavior. In this project, we proposed, designed, and implemented two tools that automate and optimize this development procedure. The Sequence Design and Optimization Tool (SDOT) uses requirements-based input to produce and visualize optimal action sequences for machine sensors and actuators. The Inline Sequence Interpretation Tool (ISIT) translates the action sequences into hardware commands, which are then queued to the hardware peripherals of YieldStar. Both tools were demonstrated for the latest machine type (YS-500) and showed tangible improvements over the existing methods. Furthermore, they can be used for the software implementation of the next product (YS-550), and it is expected that they will help decrease the implementation and deployment time of the scheduling module by 50% and 75% respectively. Figure 2: The tools developed and the benefits that the new workflow provides. Figure 1: The development of the hardware sequence generation module before and after the project.